CoaXPress 1.1 (CXP) is a simple yet powerful standard for moving high speed serial data from a camera to a frame grabber. Video is captured at speeds of up to 6.25 Gigabits/Second (Gb/S). Control commands and triggers can be sent simultaneously to the camera at rates up to 20 Mb/S (with a trigger accuracy of +/- 2 nanoseconds). Up to 13 W of power can also supplied to the camera. All of this happens over a single piece of industry standard 75 Ohm coaxial cable.
Multiple CXP links can be aggregated to support higher data rates (e.g. four links provide 25 Gb/S of data).
The CXP standard opens the door to applications where cable cost, routing requirements, and long distances have prevented the move to high resolution, high speed digital cameras. In many cases, existing coaxial infrastructure can be repurposed for CXP with very low installation costs.
The Cyton Platform
The Cyton-CXP is based on BitFlow's brand new PCIe Gen 2.0 platform. To develop the Cyton platform we first started with a clean slate and asked ourselves, "What does a next generation frame grabber need?". For sure, it needs a Gen 2.0 PCIe x8 back end for the ultimate high speed access to host memory. It also needs a sophisticated DMA engine to handle the demands of new camera interface standards. New standards demand flexibility. For example, CXP cameras will soon be able to put out streams of random sized ROIs, something our previous generation DMA engine was not capable of. Finally, we know based on years of experience of making frame grabbers that it needs flexible and powerful I/O, triggering, and routing. The CoaXPress front end is based on our Karbon-CXP, but upgraded and ready for the coming changes in the CXP standards. The Cyton platform is the foundation for today and tomorrow's frame grabbers, whether it's CoaXPress, Camera Link, or whatever new standards emerge from the Machine Vision industry.
The Virtual Frame Grabber
The Cyton-CXP4 can be configured in many different ways. It can acquire from one quad CXP-6 camera (total data rate: 25 Gb/S), four single link CXP-6 cameras, or anything in between. When acquiring from multiple cameras, each camera is attached to its own virtual frame grabber. This allows independent acquisition and control of each camera. However, when a four link camera is attached, only one virtual frame grabber is needed.
The StreamSync system consists of an Acquisition Engine and a Buffer Manager. It was first released on the Cyton-CXP and is a departure from previous BitFlow frame grabbers. The StreamSync system is a start-from-scratch complete redesign of the acquisition and DMA parts of a frame grabber. BitFlow used its years of experience in this area to design a next generation, super efficient capture system.
- Efficient support for variable sized images with fast context switches between frames
- Per frame control of acquisition properties (AOI specifically)
- Hardware control of image sequencing
- Enhanced debug capabilities
- Efficient support for on-demand buffer allocation (Genicam model)
- Gracefully recover from dropped packets (either on the input side or the DMA side)
CoaXPress High Speed Uplink
The Cyton-CXP has an optional fifth CXP connector that can run the full 6.25 Gb/S from the frame grabber to the camera. The CoaXPress standard is still evolving, but the need for this high speed uplink has already become apparent. The demands for bulk uploads to the camera and precise trigger accuracy have already outstripped the current 20 Mb/S uplink specification. The Cyton-CXP is fully ready for when the new CXP standard is released that defines when and how this uplink will be used.
PCI Express Gen 2.0 Interface
The Cyton-CXP has a Gen 2.0 x8 PCI Express bus interface. The Gen 2.0 PCIe bus doubles the data rate of the Gen 1.0 bus while using the same footprint and connectors. The board will work in Gen 2.0 x16 and x8 slots, with a minimum electrical configuration of x8. This ensures the board will run at full capacity.
Camera Control and I/O
The Cyton-CXP can acquire fixed or variable size images and features a programmable ROI (Region Of Interest) sub-windowing capability. The Cyton-CXP fully supports the CoaXPress 1.1 specification, which provides a high priority trigger packet from the frame grabber to the camera (note: both 1.1 and 1.0 cameras are supported, but the GPOI packet part of the 1.0 specification is not). All I/O signals can be routed to/from many internal and external destinations, providing a flexibility that is unprecedented in the industry. In addition, there are separate hardware I/O signals which can be connected to/from external sources. Finally, each CXP camera has a full set of these signals which can be run independently. The Cyton-CXP board, as with our past interface products, supports not only simple triggering modes, but also complicated, application-specific triggering, and control interactions with your hardware environment.
Adding the Cyton-CXP to your application is simple with our SDK, which supports both 32-bit and 64-bit operating systems. Applications can be developed using C/C++/.NET and our sophisticated buffer management APIs. In addition, free drivers can be download from our web site for most 3rd party machine vision packages. The Cyton models are software compatible with each both other and with all the other current BitFlow frame grabbers. This makes migrating applications from Camera Link or analog to CXP and vice-versa simple and quick.
- Half-Size x8 PCI Gen 2.0 Express Board
- CoaXPress 1.1 compliant (supports 1.0 and 1.1. cameras)
- Supports one to four CXP-6 cameras
- Supports multi-link CXP-6 cameras (up to four CXP links)
- Supports CXP speeds from 1.250 to 6.250 Gb/S
- Supports simultaneous capture from four 6.250 Gb/S CXP links
- Provides one CXP-6 uplink to the camera (bulk data uploads, zero latency triggers)
- Low speed uplink also supported on all links
- Uses DIN 1.0/2.3 connectors
- Uses CXP standard 4+1 connector spacing
- Provides power for all cameras (up to 13 Watts per link)
- Provides Safe Power, full protection from all power line faults
- Cameras are Plug and Play with automatic link speed detection
- Cable lengths of up to 135 meters are supported
- Cameras can be accurately synchronized, or can be completely independent
- PCI Express x8 Gen 2.0 interface (also works in x16 slots)
- Compatible with PCI Express Gen 1.0 slots
- Separate I/O for each camera
- Highly deterministic, low latency frame grabber to camera trigger
- Supports simultaneous communications to all cameras
- Windows "sees" a separate frame grabber for each camera
- FlowThru technology means no on-board memory is needed
- StreamSync acquisition engine optimizes synchronization between acquisition and DMA
- StreamSync buffer manager maximize DMA channel efficiency
- Acquire variable length frames from line scan cameras
- Acquire image sequences well beyond the 4GB barrier
- No frame rate limit
- Triggers and encoders for external control of acquisition
- Programmable signal generator for camera control (independent for each camera)
- Quadrature encoder support including sophisticated triggering schemes
- Encoder divider/multiplier
- Drivers, utilities, and examples for Windows and Linux
- Supported on both 32-bit and 64-bit platforms
- Drivers for most 3rd party processing environments (e.g. HALCON, LabView, VisionPro, MATLAB, etc.)
- Full GenICam support for control and capture
- All models are "half size" PCIe cards
- RoHS compliant
- Four single link CXP-6 cameras
- Two Dual link CXP-6 cameras
- One Quad link CXP-6 camera
- Two single link CXP-6 cameras
- One Dual link CXP-6 cameras
SDK 5.90 or later required